Title page for ETD etd-05272004-164455

Type of Document Master's Thesis
Author Alli, Pavan K
Author's Email Address palli1@lsu.edu
URN etd-05272004-164455
Title Testing a CMOS Operational Amplifier Circuit Using a Combination of Oscillation and IDDQ Test Methods
Degree Master of Science (M.S.)
Department Electrical & Computer Engineering
Advisory Committee
Advisor Name Title
Ashok Srivastava Committee Chair
Pratul Ajmera Committee Member
Theda Daniels-Race Committee Member
  • operational amplifier
  • iddq
  • built-in current sensor
  • oscillation test
Date of Defense 2004-04-15
Availability unrestricted
This work presents a case study, which attempts to improve the fault diagnosis and testability of the oscillation testing methodology applied to a typical two-stage CMOS operational amplifier. The proposed test method takes the advantage of good fault coverage through the use of a simple oscillation based test technique, which needs no test signal generation and combines it with quiescent supply current (IDDQ) testing to provide a fault confirmation. A built in current sensor (BICS), which introduces insignificant performance degradation of the circuit-under-test (CUT), has been utilized to monitor the power supply quiescent current changes in the CUT. The testability has also been enhanced in the testing procedure using a simple fault-injection technique. The approach is attractive for its simplicity, robustness and capability of built-in-self test (BIST) implementation. It can also be generalized to the oscillation based test structures of other CMOS analog and mixed-signal integrated circuits. The practical results and simulations confirm the functionality of the proposed test method.
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