Title page for ETD etd-0405102-094607


Type of Document Master's Thesis
Author Paruchuri, Surendar
Author's Email Address sparuc1@lsu.edu
URN etd-0405102-094607
Title Efficient Convolvers Using the Polynomial Residue Number System Technique
Degree Master of Science in Electrical Engineering (M.S.E.E.)
Department Electrical and Computer Engineering
Advisory Committee
Advisor Name Title
Alexander Skavantzos Committee Chair
Guoxiang Gu Committee Member
Jaganathan Ramanujam Committee Member
Keywords
  • polynomial residue number system
Date of Defense 2001-11-29
Availability unrestricted
Abstract
The problem of computing linear convolution is a very important one because with linear convolution we can mechanize digital filtering.

The linear convolution of two N-point sequences can be computed by the cyclic convolution of the following 2N-point sequences. The original sequence padded with N zero’s each. The cyclic convolution of two N-point sequences requires multiplications and additions for its computation.

A very efficient way of computing cyclic convolution of two sequences is by using the Polynomial Residue Number System (PRNS) technique. Using this technique the cyclic convolution of two N-point sequences can be computed using only N multiplications instead of N2 multiplications. This can be achieved based on some forward and inverse PRNS transformation mappings. These mappings rely on additions, subtractions and many scaling operations (multiplications by constants). The PRNS technique would lose a lot in value if these many scaling operations were difficultly implemented. In this thesis we will show how to calculate cyclic convolution of two sequences using the PRNS technique based on forward and inverse transformation mapping which rely on complement operations (negations), additions and rotation operations. These rotation operations do not require any computational hardware. Therefore the complicated hardware required for the scaling operations has now been substituted by rotators, which do not require any computational hardware.

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