Title page for ETD etd-01232007-114859


Type of Document Master's Thesis
Author Medavarapu, Chakradhar
URN etd-01232007-114859
Title An Architecture for Embedded System Communication
Degree Master of Science in Systems Science (M.S.S.S.)
Department Computer Science
Advisory Committee
Advisor Name Title
Gerald Baumgartner Committee Chair
S. Sitharama Iyengar Committee Member
Tevfik Kosar Committee Member
Keywords
  • hardware-in-the-loop simulation
  • virtual testbed
  • embedded system
Date of Defense 2006-12-06
Availability unrestricted
Abstract
Time is a major constraint in the development of most embedded systems. In many cases, the development of embedded software is directly dependent on the development of the embedded systems. This calls for a development framework that enables embedded software and hardware to be developed in parallel. In an attempt to solve the problem, a concept prototype hardware-in-the-loop (HIL) simulation methodology has been proposed and implemented at the Ohio State University for the TMS320LF2407A DSP board. We build on top of that HIL system by rewriting the low level device drivers that allow data and control information to be set simultaneously, thus, creating a software abstraction layer over various devices available on the DSP board. The device drivers allow data access at the processor and the pin level for the devices on the DSP board. This abstraction simulates external devices in a transparent manner using a device driver library that provides the same programming interface to the device simulators as to real devices. Also, it allows for the testing of both real and simulated hardware connected to the DSP board as a part of the embedded system. The main advantages of the framework are rapid prototyping, unit testing and monitoring. We also modify the existing serial line protocol and perform a comparison between the new and the existing protocol and show that the new protocol is efficient for large data transport. This protocol allows for the effective utilization of serial line bandwidth when the DSP board is used for signal processing or voice based applications. We present the virtual testbed as a software development tool. We conclude by exploring the future directions for the applications.
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